advance information this data sheet states amds current technical specifications regarding the products described herein. this data sheet may be revised by subsequent versions or modifications due to changes in technical specifications. publication# 25261 rev: a amendment/ 0 issue date: august 3, 2001 refer to amds website (www.amd.com) for the latest information. am29lv641m 64 megabit (4 m x 16-bit) mirrorbit ? 3.0 volt-only uniform sector flash memory with versatilei/o ? control distinctive characteristics architectural advantages n single power supply operation 2.7C3.6 v for read, erase, and program operations n versatilei/o ? control device generates data output voltages and tolerates data input voltages as determined by the voltage on the v io pin; operates from 1.65 to 3.6 v n manufactured on 0.23 m mirrorbit process technology n secsi ? (secured silicon) sector region 128-word sector for permanent, secure identification through an 8-word random electronic serial number, accessible through a command sequence may be programmed and locked at the factory or by the customer n flexible sector architecture one hundred twenty-eight 32 kword sectors n compatibility with jedec standards provides pinout and software compatibility for single-power supply flash, and superior inadvertent write protection n minimum 100,000 erase cycle guarantee per sector n 20-year data retention at 125 c performance characteristics n high performance 90 ns access time 25 ns page read times 1 s typical sector erase time 5.9 s typical write buffer word programming time: 16-word write buffer reduces overall programming time for multiple-word updates 4-word page read buffer 16-word write buffer n low power consumption (typical values at 3.0 v, 5 mhz) 30 ma typical active read current 50 ma typical erase/program current 1 a typical standby mode current n package options 48-pin tsop software & hardware features n software features program suspend & resume: read other sectors before programming operation is completed erase suspend & resume: read/program other sectors before an erase operation is completed data# polling & toggle bits provide status unlock bypass program command reduces overall multiple-word programming time cfi (common flash interface) compliant: allows host system to identify and accommodate multiple flash devices n hardware features sector group protection: hardware-level method of preventing write operations within a sector group temporary sector unprotect: v id -level method of changing code in locked sectors acc (high voltage) input accelerates programming time for higher throughput during system production write protect input (wp#) protects first or last sector regardless of sector protection settings hardware reset input (reset#) resets device
2 am29lv641m advance information general description the am29lv641m is a 64 mbit, 3.0 volt single power supply flash memory devices organized as 4,194,304 words. the devices have a 16-bit wide data bus, and can be programmed either in the host system or in standard eprom programmers. an access time of 90 ns is available for applications where v io 3 3.0 v. an access time of 100 ns is avail- able for applications where v io < 3.0 v. the device is offered in a 48-pin tsop or 63-ball fbga package. each device has separate chip enable (ce#), write en- able (we#) and output enable (oe#) controls. each device requires only a single 3.0 volt power supply (2.7 v to 3.6 v) for both read and write func- tions. in addition to a v cc input, a high-voltage accel- erated program (acc) input provides shorter programming times through increased current. this feature is intended to facilitate factory throughput dur- ing system production, but may also be used in the field if desired. the device is entirely command set compatible with the jedec single-power-supply flash standard . commands are written to the device using standard microprocessor write timing. write cycles also inter- nally latch addresses and data needed for the pro- gramming and erase operations. the sector erase architecture allows memory sec- tors to be erased and reprogrammed without affecting the data contents of other sectors. the device is fully erased when shipped from the factory. device programming and erasure are initiated through command sequences. once a program or erase oper- ation has begun, the host system need only poll the dq7 (data# polling) or dq6 (toggle) status bits to de- termine whether the operation is complete. to facilitate programming, an unlock bypass mode reduces com- mand sequence overhead by requiring only two write cycles to program data instead of four. the versatilei/o? (v io ) control allows the host sys- tem to set the voltage levels that the device generates at its data outputs and the voltages tolerated at its data inputs to the same voltage level that is asserted on the v io pin. this allows the device to operate in 1.8 v or 3 v system environment as required. hardware data protection measures include a low v cc detector that automatically inhibits write opera- tions during power transitions. the hardware sector protection feature disables both program and erase operations in any combination of sectors of memory. this can be achieved in-system or via programming equipment. the erase suspend/erase resume feature allows the host system to pause an erase operation in a given sector to read or program any other sector and then complete the erase operation. the program sus- pend/program resume feature enables the host sys- tem to pause a program operation in a given sector to read any other sector and then complete the program operation. the hardware reset# pin terminates any operation in progress and resets the device, after which it is then ready for a new operation. the reset# pin may be tied to the system reset circuitry. a system reset would thus also reset the device, enabling the host system to read boot-up firmware from the flash memory device. the device reduces power consumption in the standby mode when it detects specific voltage levels on ce# and reset#, or when addresses have been stable for a specified period of time. the secsi ? (secured silicon) sector provides a 128-word area for code or data that can be perma- nently protected. once this sector is protected, no fur- ther changes within the sector can occur. the write protect (wp#) feature protects the first or last sector by asserting a logic low on the wp# pin. the protected sector will still be protected even during accelerated programming. amd mirrorbit flash technology combines years of flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effec- tiveness. the device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. the data is programmed using hot electron injection.
am29lv641m 3 advance information product selector guide block diagram part number am29lv641m speed option v cc = 2.7C3.6 v all devices 90 (v io = 3.0C3.6 v) 101 (v io = 2.7C3.0 v) 102 (v io = 1.65C2.7 v) max. access time (ns) 90 100 100 max. ce# access time (ns) 90 100 100 max. page access time (t pac c )253040 max. oe# access time (ns) 25 30 40 input/output buffers x-decoder y-decoder chip enable output enable logic erase voltage generator pgm voltage generator timer v cc detector state control command register v cc v ss we# wp# acc ce# oe# stb stb dq0 C dq15 sector switches reset# data latch y-gating cell matrix address latch a21Ca0 v io
4 am29lv641m advance information connection diagrams 1 16 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 48 33 47 46 45 44 43 42 41 40 39 38 37 36 35 34 25 32 31 30 29 28 27 26 a15 a18 a14 a13 a12 a11 a10 a9 a8 a21 a20 we# reset# acc wp# a19 a1 a17 a7 a6 a5 a4 a3 a2 a16 dq2 v io v ss dq15 dq7 dq14 dq6 dq13 dq9 dq1 dq8 dq0 oe# v ss ce# a0 dq5 dq12 dq4 v cc dq11 dq3 dq10 48-pin standard tsop 1 16 2 3 4 5 6 7 8 17 18 19 20 21 22 23 24 9 10 11 12 13 14 15 48 33 47 46 45 44 43 42 41 40 39 38 37 36 35 34 25 32 31 30 29 28 27 26 a15 a18 a14 a13 a12 a11 a10 a9 a8 a21 a20 we# reset# acc wp# a19 a1 a17 a7 a6 a5 a4 a3 a2 a16 dq2 v io v ss dq15 dq7 dq14 dq6 dq13 dq9 dq1 dq8 dq0 oe# v ss ce# a0 dq5 dq12 dq4 v cc dq11 dq3 dq10 48-pin reverse tsop
am29lv641m 5 advance information pin description a21Ca0 = 22 addresses inputs dq15Cdq0 = 16 data inputs/outputs ce# = chip enable input oe# = output enable input we# = write enable input wp# = hardware write protect input acc = acceleration input reset# = hardware reset pin input v cc = 3.0 volt-only single power supply (see product selector guide for speed options and voltage supply tolerances) v io = output buffer power v ss = device ground nc = pin not connected internally logic symbol 22 16 dq15Cdq0 a21Ca0 ce# oe# we# reset# acc wp# v io
6 am29lv641m advance information ordering information standard products amd standard products are available in several packages and operating ranges. the order number (valid combination) is formed by a combination of the following: valid combinations valid combinations list configurations planned to be supported in vol- ume for this device. consult the local amd sales office to confirm availability of specific valid combinations and to check on newly re- leased combinations. am29lv641m h 90 e i temperature range i = industrial (C40 c to +85 c) package type e = 48-pin thin small outline package (tsop) standard pinout (ts 048) f = 48-pin thin small outline package (tsop) reverse pinout (tsr048) speed option see product selector guide and valid combinations sector architecture and sector write protection (wp# = 0) h = uniform sector device, highest address sector protected l = uniform sector device, lowest address sector protected device number/description am29lv641m 64 megabit (4 m x 16-bit) mirrorbit uniform sector flash memory with versatileio ? control 3.0 volt-only read, program, and erase valid combinations for tsop and ssop packages speed/v io range am29lv641mh90, am29lv641ml90 ei, fi 90 ns v io = 3.0 v C 3.6 v am29lv641mh101, am29lv641ml101 100 ns v io = 2.7 v C 3.0 v am29lv641mh102, am29lv641ml102 100 ns v io = 1.65 v C 2.7 v
am29lv641m 7 advance information revision summary revision a (august 3, 2001) initial release as abbreviated advance information data sheet. trademarks copyright ? 2001 advanced micro devices, inc. all rights reserved. amd, the amd logo, and combinations thereof are registered trademarks of advanced micro devices, inc. expressflash is a trademark of advanced micro devices, inc. product names used in this publication are for identification purposes only and may be trademarks of their respective companies .
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